INTEL_GVT_IRQ_INFO_PCU  315 drivers/gpu/drm/i915/gvt/interrupt.c 	{ INTEL_GVT_IRQ_INFO_MASTER, 30, INTEL_GVT_IRQ_INFO_PCU, ~0 },
INTEL_GVT_IRQ_INFO_PCU  520 drivers/gpu/drm/i915/gvt/interrupt.c 	SET_IRQ_GROUP(irq, INTEL_GVT_IRQ_INFO_PCU, &gen8_pcu_info);
INTEL_GVT_IRQ_INFO_PCU  599 drivers/gpu/drm/i915/gvt/interrupt.c 	SET_BIT_INFO(irq, 24, PCU_THERMAL, INTEL_GVT_IRQ_INFO_PCU);
INTEL_GVT_IRQ_INFO_PCU  600 drivers/gpu/drm/i915/gvt/interrupt.c 	SET_BIT_INFO(irq, 25, PCU_PCODE2DRIVER_MAILBOX, INTEL_GVT_IRQ_INFO_PCU);