INTEL_GVT_IRQ_INFO_GT1 305 drivers/gpu/drm/i915/gvt/interrupt.c { INTEL_GVT_IRQ_INFO_MASTER, 2, INTEL_GVT_IRQ_INFO_GT1, 0xffff }, INTEL_GVT_IRQ_INFO_GT1 306 drivers/gpu/drm/i915/gvt/interrupt.c { INTEL_GVT_IRQ_INFO_MASTER, 3, INTEL_GVT_IRQ_INFO_GT1, 0xffff0000 }, INTEL_GVT_IRQ_INFO_GT1 512 drivers/gpu/drm/i915/gvt/interrupt.c SET_IRQ_GROUP(irq, INTEL_GVT_IRQ_INFO_GT1, &gen8_gt1_info); INTEL_GVT_IRQ_INFO_GT1 535 drivers/gpu/drm/i915/gvt/interrupt.c SET_BIT_INFO(irq, 0, VCS_MI_USER_INTERRUPT, INTEL_GVT_IRQ_INFO_GT1); INTEL_GVT_IRQ_INFO_GT1 536 drivers/gpu/drm/i915/gvt/interrupt.c SET_BIT_INFO(irq, 4, VCS_MI_FLUSH_DW, INTEL_GVT_IRQ_INFO_GT1); INTEL_GVT_IRQ_INFO_GT1 537 drivers/gpu/drm/i915/gvt/interrupt.c SET_BIT_INFO(irq, 8, VCS_AS_CONTEXT_SWITCH, INTEL_GVT_IRQ_INFO_GT1); INTEL_GVT_IRQ_INFO_GT1 541 drivers/gpu/drm/i915/gvt/interrupt.c INTEL_GVT_IRQ_INFO_GT1); INTEL_GVT_IRQ_INFO_GT1 543 drivers/gpu/drm/i915/gvt/interrupt.c INTEL_GVT_IRQ_INFO_GT1); INTEL_GVT_IRQ_INFO_GT1 545 drivers/gpu/drm/i915/gvt/interrupt.c INTEL_GVT_IRQ_INFO_GT1);