INTEL_GVT_IRQ_INFO_DE_PIPE_C  311 drivers/gpu/drm/i915/gvt/interrupt.c 	{ INTEL_GVT_IRQ_INFO_MASTER, 18, INTEL_GVT_IRQ_INFO_DE_PIPE_C, ~0 },
INTEL_GVT_IRQ_INFO_DE_PIPE_C  517 drivers/gpu/drm/i915/gvt/interrupt.c 	SET_IRQ_GROUP(irq, INTEL_GVT_IRQ_INFO_DE_PIPE_C, &gen8_de_pipe_c_info);
INTEL_GVT_IRQ_INFO_DE_PIPE_C  555 drivers/gpu/drm/i915/gvt/interrupt.c 	SET_BIT_INFO(irq, 0, PIPE_C_VBLANK, INTEL_GVT_IRQ_INFO_DE_PIPE_C);
INTEL_GVT_IRQ_INFO_DE_PIPE_C  582 drivers/gpu/drm/i915/gvt/interrupt.c 		SET_BIT_INFO(irq, 4, PRIMARY_C_FLIP_DONE, INTEL_GVT_IRQ_INFO_DE_PIPE_C);
INTEL_GVT_IRQ_INFO_DE_PIPE_C  583 drivers/gpu/drm/i915/gvt/interrupt.c 		SET_BIT_INFO(irq, 5, SPRITE_C_FLIP_DONE, INTEL_GVT_IRQ_INFO_DE_PIPE_C);
INTEL_GVT_IRQ_INFO_DE_PIPE_C  591 drivers/gpu/drm/i915/gvt/interrupt.c 		SET_BIT_INFO(irq, 3, PRIMARY_C_FLIP_DONE, INTEL_GVT_IRQ_INFO_DE_PIPE_C);
INTEL_GVT_IRQ_INFO_DE_PIPE_C  595 drivers/gpu/drm/i915/gvt/interrupt.c 		SET_BIT_INFO(irq, 4, SPRITE_C_FLIP_DONE, INTEL_GVT_IRQ_INFO_DE_PIPE_C);