INTEL_FAM6_TIGERLAKE_L 5037 arch/x86/events/intel/core.c 	case INTEL_FAM6_TIGERLAKE_L:
INTEL_FAM6_TIGERLAKE_L  652 arch/x86/events/intel/cstate.c 	X86_CSTATES_MODEL(INTEL_FAM6_TIGERLAKE_L, icl_cstates),
INTEL_FAM6_TIGERLAKE_L   99 arch/x86/events/msr.c 	case INTEL_FAM6_TIGERLAKE_L: