INTC_REG_ENABLE    51 arch/mips/ralink/irq.c 	[INTC_REG_ENABLE] = 0x34,
INTC_REG_ENABLE    71 arch/mips/ralink/irq.c 	rt_intc_w32(BIT(d->hwirq), INTC_REG_ENABLE);
INTC_REG_ENABLE   184 arch/mips/ralink/irq.c 	rt_intc_w32(INTC_INT_GLOBAL, INTC_REG_ENABLE);