IMX7D_PLL_DRAM_MAIN_BYPASS  429 drivers/clk/imx/clk-imx7d.c 	hws[IMX7D_PLL_DRAM_MAIN_BYPASS] = imx_clk_hw_mux_flags("pll_dram_main_bypass", base + 0x70, 16, 1, pll_dram_bypass_sel, ARRAY_SIZE(pll_dram_bypass_sel), CLK_SET_RATE_PARENT);
IMX7D_PLL_DRAM_MAIN_BYPASS  882 drivers/clk/imx/clk-imx7d.c 	clk_set_parent(hws[IMX7D_PLL_DRAM_MAIN_BYPASS]->clk, hws[IMX7D_PLL_DRAM_MAIN]->clk);