IMX6UL_CLK_PLL3_USB_OTG 177 drivers/clk/imx/clk-imx6ul.c hws[IMX6UL_CLK_PLL3_USB_OTG] = imx_clk_hw_gate("pll3_usb_otg", "pll3_bypass", base + 0x10, 13); IMX6UL_CLK_PLL3_USB_OTG 508 drivers/clk/imx/clk-imx6ul.c clk_set_parent(hws[IMX6UL_CLK_SIM_PRE_SEL]->clk, hws[IMX6UL_CLK_PLL3_USB_OTG]->clk);