IMX6SLL_CLK_PLL2_BUS  156 drivers/clk/imx/clk-imx6sll.c 	hws[IMX6SLL_CLK_PLL2_BUS]	= imx_clk_hw_gate("pll2_bus",	   "pll2_bypass", base + 0x30, 13);
IMX6SLL_CLK_PLL2_BUS  373 drivers/clk/imx/clk-imx6sll.c 	clk_set_parent(hws[IMX6SLL_CLK_PERIPH_PRE]->clk, hws[IMX6SLL_CLK_PLL2_BUS]->clk);