IMX6QDL_CLK_PLL5_VIDEO_DIV  152 drivers/clk/imx/clk-imx6q.c 	case IMX6QDL_CLK_PLL5_VIDEO_DIV:
IMX6QDL_CLK_PLL5_VIDEO_DIV  603 drivers/clk/imx/clk-imx6q.c 	hws[IMX6QDL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_div", CLK_SET_RATE_PARENT, base + 0x170, 30, 2, 0, video_div_table, &imx_ccm_lock);
IMX6QDL_CLK_PLL5_VIDEO_DIV  925 drivers/clk/imx/clk-imx6q.c 	clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI0_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk);
IMX6QDL_CLK_PLL5_VIDEO_DIV  926 drivers/clk/imx/clk-imx6q.c 	clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI1_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk);
IMX6QDL_CLK_PLL5_VIDEO_DIV  927 drivers/clk/imx/clk-imx6q.c 	clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI0_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk);
IMX6QDL_CLK_PLL5_VIDEO_DIV  928 drivers/clk/imx/clk-imx6q.c 	clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI1_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk);