IMX6QDL_CLK_IPU2_DI1_PRE  755 drivers/clk/imx/clk-imx6q.c 	hws[IMX6QDL_CLK_IPU2_DI1_PRE]     = imx_clk_hw_divider("ipu2_di1_pre",     "ipu2_di1_pre_sel",  base + 0x38, 12, 3);
IMX6QDL_CLK_IPU2_DI1_PRE  932 drivers/clk/imx/clk-imx6q.c 	clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI1_SEL]->clk, hws[IMX6QDL_CLK_IPU2_DI1_PRE]->clk);