IMX6QDL_CLK_IPU1_DI0_PRE  752 drivers/clk/imx/clk-imx6q.c 	hws[IMX6QDL_CLK_IPU1_DI0_PRE]     = imx_clk_hw_divider("ipu1_di0_pre",     "ipu1_di0_pre_sel",  base + 0x34, 3,  3);
IMX6QDL_CLK_IPU1_DI0_PRE  929 drivers/clk/imx/clk-imx6q.c 	clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI0_SEL]->clk, hws[IMX6QDL_CLK_IPU1_DI0_PRE]->clk);