IMR_NUM            28 arch/arm/mach-imx/gpc.c #define GPC_MAX_IRQS		(IMR_NUM * 32)
IMR_NUM            31 arch/arm/mach-imx/gpc.c static u32 gpc_wake_irqs[IMR_NUM];
IMR_NUM            32 arch/arm/mach-imx/gpc.c static u32 gpc_saved_imrs[IMR_NUM];
IMR_NUM            71 arch/arm/mach-imx/gpc.c 	for (i = 0; i < IMR_NUM; i++) {
IMR_NUM            85 arch/arm/mach-imx/gpc.c 	for (i = 0; i < IMR_NUM; i++)
IMR_NUM           110 arch/arm/mach-imx/gpc.c 	for (i = 0; i < IMR_NUM; i++) {
IMR_NUM           122 arch/arm/mach-imx/gpc.c 	for (i = 0; i < IMR_NUM; i++)
IMR_NUM           258 arch/arm/mach-imx/gpc.c 	for (i = 0; i < IMR_NUM; i++)
IMR_NUM            13 drivers/irqchip/irq-imx-gpcv2.c #define GPC_MAX_IRQS            (IMR_NUM * 32)
IMR_NUM            24 drivers/irqchip/irq-imx-gpcv2.c 	u32			wakeup_sources[IMR_NUM];
IMR_NUM            25 drivers/irqchip/irq-imx-gpcv2.c 	u32			saved_irq_mask[IMR_NUM];
IMR_NUM            46 drivers/irqchip/irq-imx-gpcv2.c 	for (i = 0; i < IMR_NUM; i++) {
IMR_NUM            64 drivers/irqchip/irq-imx-gpcv2.c 	for (i = 0; i < IMR_NUM; i++)
IMR_NUM           255 drivers/irqchip/irq-imx-gpcv2.c 	for (i = 0; i < IMR_NUM; i++) {