IMGU_REG_SP_DMEM_BASE  497 drivers/staging/media/ipu3/ipu3-css.c 	       IMGU_REG_SP_DMEM_BASE(sp) + bi->info.sp.init_dmem_data);
IMGU_REG_SP_DMEM_BASE  504 drivers/staging/media/ipu3/ipu3-css.c 	if (imgu_hw_wait(css->base, IMGU_REG_SP_DMEM_BASE(sp)
IMGU_REG_SP_DMEM_BASE  578 drivers/staging/media/ipu3/ipu3-css.c 	       base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.per_frame_data);
IMGU_REG_SP_DMEM_BASE  581 drivers/staging/media/ipu3/ipu3-css.c 	       base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sw_state);
IMGU_REG_SP_DMEM_BASE  582 drivers/staging/media/ipu3/ipu3-css.c 	writel(1, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.invalidate_tlb);
IMGU_REG_SP_DMEM_BASE  587 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.isp_started);
IMGU_REG_SP_DMEM_BASE  588 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_SP_DMEM_BASE(0) +
IMGU_REG_SP_DMEM_BASE  590 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sleep_mode);
IMGU_REG_SP_DMEM_BASE  591 drivers/staging/media/ipu3/ipu3-css.c 	writel(0, base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.invalidate_tlb);
IMGU_REG_SP_DMEM_BASE  592 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_ABI_SP_COMM_COMMAND_READY, base + IMGU_REG_SP_DMEM_BASE(0)
IMGU_REG_SP_DMEM_BASE  598 drivers/staging/media/ipu3/ipu3-css.c 		writel(event_mask, base + IMGU_REG_SP_DMEM_BASE(0)
IMGU_REG_SP_DMEM_BASE  601 drivers/staging/media/ipu3/ipu3-css.c 	writel(1, base + IMGU_REG_SP_DMEM_BASE(0) +
IMGU_REG_SP_DMEM_BASE  609 drivers/staging/media/ipu3/ipu3-css.c 	       base + IMGU_REG_SP_DMEM_BASE(1) + bi->info.sp.sw_state);
IMGU_REG_SP_DMEM_BASE  614 drivers/staging/media/ipu3/ipu3-css.c 	writel(IMGU_ABI_SP_COMM_COMMAND_READY, base + IMGU_REG_SP_DMEM_BASE(1)
IMGU_REG_SP_DMEM_BASE  627 drivers/staging/media/ipu3/ipu3-css.c 	       base + IMGU_REG_SP_DMEM_BASE(0) +
IMGU_REG_SP_DMEM_BASE  632 drivers/staging/media/ipu3/ipu3-css.c 	if (readl(base + IMGU_REG_SP_DMEM_BASE(0) + bi->info.sp.sw_state) !=
IMGU_REG_SP_DMEM_BASE 1107 drivers/staging/media/ipu3/ipu3-css.c 	struct imgu_abi_queues __iomem *q = base + IMGU_REG_SP_DMEM_BASE(sp) +
IMGU_REG_SP_DMEM_BASE 1121 drivers/staging/media/ipu3/ipu3-css.c 	struct imgu_abi_queues __iomem *q = base + IMGU_REG_SP_DMEM_BASE(sp) +
IMGU_REG_SP_DMEM_BASE 1159 drivers/staging/media/ipu3/ipu3-css.c 	struct imgu_abi_queues __iomem *q = base + IMGU_REG_SP_DMEM_BASE(sp) +
IMGU_REG_SP_DMEM_BASE 2370 drivers/staging/media/ipu3/ipu3-css.c 			u32 cnt = readl(base + IMGU_REG_SP_DMEM_BASE(0) +
IMGU_REG_SP_DMEM_BASE 2372 drivers/staging/media/ipu3/ipu3-css.c 			u32 val = readl(base + IMGU_REG_SP_DMEM_BASE(0) +