APMU_SDH1         344 drivers/clk/mmp/clk-mmp2.c 	clk = mmp_clk_register_apmu("sdh1", "sdh_div", apmu_base + APMU_SDH1,
APMU_SDH1         229 drivers/clk/mmp/clk-of-mmp2.c 	{MMP2_CLK_SDH1, "sdh1_clk", "sdh_mix_clk", CLK_SET_RATE_PARENT, APMU_SDH1, 0x1b, 0x1b, 0x0, 0, &sdh_lock},
APMU_SDH1         191 drivers/clk/mmp/clk-of-pxa168.c 	{0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 1, 0, &sdh1_lock},
APMU_SDH1         207 drivers/clk/mmp/clk-of-pxa168.c 	{PXA168_CLK_SDH1, "sdh1_clk", "sdh1_mux", CLK_SET_RATE_PARENT, APMU_SDH1, 0x1b, 0x1b, 0x0, 0, &sdh1_lock},
APMU_SDH1         197 drivers/clk/mmp/clk-of-pxa910.c 	{0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6, 1, 0, &sdh1_lock},
APMU_SDH1         213 drivers/clk/mmp/clk-of-pxa910.c 	{PXA910_CLK_SDH1, "sdh1_clk", "sdh1_mux", CLK_SET_RATE_PARENT, APMU_SDH1, 0x1b, 0x1b, 0x0, 0, &sdh1_lock},
APMU_SDH1         299 drivers/clk/mmp/clk-pxa168.c 				apmu_base + APMU_SDH1, 6, 1, 0, &clk_lock);
APMU_SDH1         302 drivers/clk/mmp/clk-pxa168.c 	clk = mmp_clk_register_apmu("sdh1", "sdh1_mux", apmu_base + APMU_SDH1,
APMU_SDH1         274 drivers/clk/mmp/clk-pxa910.c 				apmu_base + APMU_SDH1, 6, 1, 0, &clk_lock);
APMU_SDH1         278 drivers/clk/mmp/clk-pxa910.c 				apmu_base + APMU_SDH1, 0x1b, &clk_lock);