APMU_DFC          202 drivers/clk/mmp/clk-of-pxa168.c 	{PXA168_CLK_DFC, "dfc_clk", "pll1_4", CLK_SET_RATE_PARENT, APMU_DFC, 0x19b, 0x19b, 0x0, 0, NULL},
APMU_DFC          208 drivers/clk/mmp/clk-of-pxa910.c 	{PXA910_CLK_DFC, "dfc_clk", "pll1_4", CLK_SET_RATE_PARENT, APMU_DFC, 0x19b, 0x19b, 0x0, 0, NULL},
APMU_DFC          282 drivers/clk/mmp/clk-pxa168.c 	clk = mmp_clk_register_apmu("dfc", "pll1_4", apmu_base + APMU_DFC,
APMU_DFC          258 drivers/clk/mmp/clk-pxa910.c 				apmu_base + APMU_DFC, 0x19b, &clk_lock);