APIC_REG_MASK 1299 arch/x86/kvm/lapic.c (APIC_REG_MASK(first) * ((1ull << (count)) - 1)) APIC_REG_MASK 1308 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_ID) | APIC_REG_MASK 1309 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_LVR) | APIC_REG_MASK 1310 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_TASKPRI) | APIC_REG_MASK 1311 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_PROCPRI) | APIC_REG_MASK 1312 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_LDR) | APIC_REG_MASK 1313 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_DFR) | APIC_REG_MASK 1314 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_SPIV) | APIC_REG_MASK 1318 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_ESR) | APIC_REG_MASK 1319 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_ICR) | APIC_REG_MASK 1320 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_ICR2) | APIC_REG_MASK 1321 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_LVTT) | APIC_REG_MASK 1322 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_LVTTHMR) | APIC_REG_MASK 1323 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_LVTPC) | APIC_REG_MASK 1324 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_LVT0) | APIC_REG_MASK 1325 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_LVT1) | APIC_REG_MASK 1326 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_LVTERR) | APIC_REG_MASK 1327 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_TMICT) | APIC_REG_MASK 1328 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_TMCCT) | APIC_REG_MASK 1329 arch/x86/kvm/lapic.c APIC_REG_MASK(APIC_TDCR); APIC_REG_MASK 1333 arch/x86/kvm/lapic.c valid_reg_mask |= APIC_REG_MASK(APIC_ARBPRI); APIC_REG_MASK 1335 arch/x86/kvm/lapic.c if (offset > 0x3f0 || !(valid_reg_mask & APIC_REG_MASK(offset)))