IE_SW0             51 arch/mips/include/asm/sn/sn0/ip27.h #define SRB_SWTIMO	IE_SW0		/* 0x0100 */
IE_SW0            267 arch/mips/kernel/smp-bmips.c 	set_c0_status(IE_SW0 | IE_SW1 | bmips_tp1_irqs | IE_IRQ5 | ST0_IE);
IE_SW0            399 arch/mips/kernel/smp-bmips.c 		IE_IRQ5 | bmips_tp1_irqs | IE_SW0 | IE_SW1 | ST0_IE | ST0_BEV,
IE_SW0            400 arch/mips/kernel/smp-bmips.c 		IE_SW0 | IE_SW1 | ST0_IE | ST0_BEV);
IE_SW0             42 drivers/irqchip/irq-mips-cpu.c 	set_c0_status(IE_SW0 << d->hwirq);
IE_SW0             48 drivers/irqchip/irq-mips-cpu.c 	clear_c0_status(IE_SW0 << d->hwirq);