ID_ISAR5_SHA2_SHIFT  302 arch/arm64/kernel/cpufeature.c 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_SHA2_SHIFT, 4, 0),
ID_ISAR5_SHA2_SHIFT 1707 arch/arm64/kernel/cpufeature.c 	HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_SHA2_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA2),