ID_AA64ISAR1_APA_SHIFT  148 arch/arm64/kernel/cpufeature.c 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_APA_SHIFT, 4, 0),
ID_AA64ISAR1_APA_SHIFT 1515 arch/arm64/kernel/cpufeature.c 		.field_pos = ID_AA64ISAR1_APA_SHIFT,
ID_AA64ISAR1_APA_SHIFT 1605 arch/arm64/kernel/cpufeature.c 		HWCAP_CPUID_MATCH(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_APA_SHIFT,
ID_AA64ISAR1_APA_SHIFT 1084 arch/arm64/kvm/sys_regs.c 		val &= ~((0xfUL << ID_AA64ISAR1_APA_SHIFT) |