ID_AA64ISAR0_CRC32_SHIFT  128 arch/arm64/kernel/cpufeature.c 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_CRC32_SHIFT, 4, 0),
ID_AA64ISAR0_CRC32_SHIFT 1469 arch/arm64/kernel/cpufeature.c 		.field_pos = ID_AA64ISAR0_CRC32_SHIFT,
ID_AA64ISAR0_CRC32_SHIFT 1634 arch/arm64/kernel/cpufeature.c 	HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_CRC32_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_CRC32),