ICMR 21 arch/arm/mach-pxa/include/mach/mtd-xip.h #define xip_irqpending() (readl(ICIP) & readl(ICMR)) ICMR 68 arch/arm/mach-pxa/irq.c uint32_t icmr = __raw_readl(base + ICMR); ICMR 71 arch/arm/mach-pxa/irq.c __raw_writel(icmr, base + ICMR); ICMR 78 arch/arm/mach-pxa/irq.c uint32_t icmr = __raw_readl(base + ICMR); ICMR 81 arch/arm/mach-pxa/irq.c __raw_writel(icmr, base + ICMR); ICMR 97 arch/arm/mach-pxa/irq.c icmr = __raw_readl(pxa_irq_base + ICMR); ICMR 159 arch/arm/mach-pxa/irq.c __raw_writel(0, base + ICMR); /* disable all IRQs */ ICMR 188 arch/arm/mach-pxa/irq.c saved_icmr[i] = __raw_readl(base + ICMR); ICMR 189 arch/arm/mach-pxa/irq.c __raw_writel(0, base + ICMR); ICMR 207 arch/arm/mach-pxa/irq.c __raw_writel(saved_icmr[i], base + ICMR); ICMR 17 arch/arm/mach-sa1100/include/mach/mtd-xip.h #define xip_irqpending() (ICIP & ICMR) ICMR 93 arch/arm/mach-sa1100/pm.c ICMR = 0; ICMR 38 drivers/irqchip/irq-sa11x0.c reg = readl_relaxed(iobase + ICMR); ICMR 40 drivers/irqchip/irq-sa11x0.c writel_relaxed(reg, iobase + ICMR); ICMR 47 drivers/irqchip/irq-sa11x0.c reg = readl_relaxed(iobase + ICMR); ICMR 49 drivers/irqchip/irq-sa11x0.c writel_relaxed(reg, iobase + ICMR); ICMR 93 drivers/irqchip/irq-sa11x0.c st->icmr = readl_relaxed(iobase + ICMR); ICMR 100 drivers/irqchip/irq-sa11x0.c writel_relaxed(st->icmr & 0xfffff000, iobase + ICMR); ICMR 113 drivers/irqchip/irq-sa11x0.c writel_relaxed(st->icmr, iobase + ICMR); ICMR 137 drivers/irqchip/irq-sa11x0.c icmr = readl_relaxed(iobase + ICMR); ICMR 155 drivers/irqchip/irq-sa11x0.c writel_relaxed(0, iobase + ICMR);