ICC_CTLR_EL1_PRI_BITS_SHIFT 30 arch/arm64/kvm/vgic-sys-reg-v3.c ICC_CTLR_EL1_PRI_BITS_SHIFT) + 1; ICC_CTLR_EL1_PRI_BITS_SHIFT 66 arch/arm64/kvm/vgic-sys-reg-v3.c ICC_CTLR_EL1_PRI_BITS_SHIFT; ICC_CTLR_EL1_PRI_BITS_SHIFT 680 drivers/irqchip/irq-gic-v3.c pribits >>= ICC_CTLR_EL1_PRI_BITS_SHIFT; ICC_CTLR_EL1_PRI_BITS_SHIFT 491 include/linux/irqchip/arm-gic-v3.h #define ICC_CTLR_EL1_PRI_BITS_MASK (0x7 << ICC_CTLR_EL1_PRI_BITS_SHIFT) ICC_CTLR_EL1_PRI_BITS_SHIFT 968 virt/kvm/arm/hyp/vgic-v3-sr.c val = ((vtr >> 29) & 7) << ICC_CTLR_EL1_PRI_BITS_SHIFT;