ICC_CTLR_EL1_A3V_SHIFT   52 arch/arm64/kvm/vgic-sys-reg-v3.c 		a3v = (val & ICC_CTLR_EL1_A3V_MASK) >> ICC_CTLR_EL1_A3V_SHIFT;
ICC_CTLR_EL1_A3V_SHIFT   73 arch/arm64/kvm/vgic-sys-reg-v3.c 			ICC_CTLR_EL1_A3V_SHIFT;
ICC_CTLR_EL1_A3V_SHIFT  497 include/linux/irqchip/arm-gic-v3.h #define ICC_CTLR_EL1_A3V_MASK		(0x1 << ICC_CTLR_EL1_A3V_SHIFT)
ICC_CTLR_EL1_A3V_SHIFT  974 virt/kvm/arm/hyp/vgic-v3-sr.c 	val |= ((vtr >> 21) & 1) << ICC_CTLR_EL1_A3V_SHIFT;