ICACHE_WAY_SIZE    26 arch/xtensa/include/asm/cache.h #if DCACHE_WAY_SIZE >= ICACHE_WAY_SIZE
ICACHE_WAY_SIZE    29 arch/xtensa/include/asm/cache.h # define CACHE_WAY_SIZE ICACHE_WAY_SIZE
ICACHE_WAY_SIZE    78 arch/xtensa/include/asm/cacheflush.h #if defined(CONFIG_MMU) && (ICACHE_WAY_SIZE > PAGE_SIZE)
ICACHE_WAY_SIZE    77 arch/xtensa/include/asm/page.h #if ICACHE_WAY_SIZE > PAGE_SIZE
ICACHE_WAY_SIZE    79 arch/xtensa/include/asm/page.h # define ICACHE_ALIAS_MASK	(PAGE_MASK & (ICACHE_WAY_SIZE - 1))
ICACHE_WAY_SIZE    75 arch/xtensa/include/asm/pgtable.h #if 2 * DCACHE_WAY_SIZE > ICACHE_WAY_SIZE
ICACHE_WAY_SIZE    78 arch/xtensa/include/asm/pgtable.h #define TLBTEMP_SIZE		ICACHE_WAY_SIZE
ICACHE_WAY_SIZE   295 arch/xtensa/mm/misc.S #if (ICACHE_WAY_SIZE > PAGE_SIZE)