APBC_REG 18 arch/arm/mach-mmp/clock-mmp2.c #define APBC_RTC APBC_REG(0x000) APBC_REG 19 arch/arm/mach-mmp/clock-mmp2.c #define APBC_TWSI1 APBC_REG(0x004) APBC_REG 20 arch/arm/mach-mmp/clock-mmp2.c #define APBC_TWSI2 APBC_REG(0x008) APBC_REG 21 arch/arm/mach-mmp/clock-mmp2.c #define APBC_TWSI3 APBC_REG(0x00c) APBC_REG 22 arch/arm/mach-mmp/clock-mmp2.c #define APBC_TWSI4 APBC_REG(0x010) APBC_REG 23 arch/arm/mach-mmp/clock-mmp2.c #define APBC_KPC APBC_REG(0x018) APBC_REG 24 arch/arm/mach-mmp/clock-mmp2.c #define APBC_UART1 APBC_REG(0x02c) APBC_REG 25 arch/arm/mach-mmp/clock-mmp2.c #define APBC_UART2 APBC_REG(0x030) APBC_REG 26 arch/arm/mach-mmp/clock-mmp2.c #define APBC_UART3 APBC_REG(0x034) APBC_REG 27 arch/arm/mach-mmp/clock-mmp2.c #define APBC_GPIO APBC_REG(0x038) APBC_REG 28 arch/arm/mach-mmp/clock-mmp2.c #define APBC_PWM0 APBC_REG(0x03c) APBC_REG 29 arch/arm/mach-mmp/clock-mmp2.c #define APBC_PWM1 APBC_REG(0x040) APBC_REG 30 arch/arm/mach-mmp/clock-mmp2.c #define APBC_PWM2 APBC_REG(0x044) APBC_REG 31 arch/arm/mach-mmp/clock-mmp2.c #define APBC_PWM3 APBC_REG(0x048) APBC_REG 32 arch/arm/mach-mmp/clock-mmp2.c #define APBC_SSP0 APBC_REG(0x04c) APBC_REG 33 arch/arm/mach-mmp/clock-mmp2.c #define APBC_SSP1 APBC_REG(0x050) APBC_REG 34 arch/arm/mach-mmp/clock-mmp2.c #define APBC_SSP2 APBC_REG(0x054) APBC_REG 35 arch/arm/mach-mmp/clock-mmp2.c #define APBC_SSP3 APBC_REG(0x058) APBC_REG 36 arch/arm/mach-mmp/clock-mmp2.c #define APBC_SSP4 APBC_REG(0x05c) APBC_REG 37 arch/arm/mach-mmp/clock-mmp2.c #define APBC_SSP5 APBC_REG(0x060) APBC_REG 38 arch/arm/mach-mmp/clock-mmp2.c #define APBC_TWSI5 APBC_REG(0x07c) APBC_REG 39 arch/arm/mach-mmp/clock-mmp2.c #define APBC_TWSI6 APBC_REG(0x080) APBC_REG 40 arch/arm/mach-mmp/clock-mmp2.c #define APBC_UART4 APBC_REG(0x088) APBC_REG 18 arch/arm/mach-mmp/clock-pxa168.c #define APBC_UART1 APBC_REG(0x000) APBC_REG 19 arch/arm/mach-mmp/clock-pxa168.c #define APBC_UART2 APBC_REG(0x004) APBC_REG 20 arch/arm/mach-mmp/clock-pxa168.c #define APBC_GPIO APBC_REG(0x008) APBC_REG 21 arch/arm/mach-mmp/clock-pxa168.c #define APBC_PWM1 APBC_REG(0x00c) APBC_REG 22 arch/arm/mach-mmp/clock-pxa168.c #define APBC_PWM2 APBC_REG(0x010) APBC_REG 23 arch/arm/mach-mmp/clock-pxa168.c #define APBC_PWM3 APBC_REG(0x014) APBC_REG 24 arch/arm/mach-mmp/clock-pxa168.c #define APBC_PWM4 APBC_REG(0x018) APBC_REG 25 arch/arm/mach-mmp/clock-pxa168.c #define APBC_RTC APBC_REG(0x028) APBC_REG 26 arch/arm/mach-mmp/clock-pxa168.c #define APBC_TWSI0 APBC_REG(0x02c) APBC_REG 27 arch/arm/mach-mmp/clock-pxa168.c #define APBC_KPC APBC_REG(0x030) APBC_REG 28 arch/arm/mach-mmp/clock-pxa168.c #define APBC_TWSI1 APBC_REG(0x06c) APBC_REG 29 arch/arm/mach-mmp/clock-pxa168.c #define APBC_UART3 APBC_REG(0x070) APBC_REG 30 arch/arm/mach-mmp/clock-pxa168.c #define APBC_SSP1 APBC_REG(0x81c) APBC_REG 31 arch/arm/mach-mmp/clock-pxa168.c #define APBC_SSP2 APBC_REG(0x820) APBC_REG 32 arch/arm/mach-mmp/clock-pxa168.c #define APBC_SSP3 APBC_REG(0x84c) APBC_REG 33 arch/arm/mach-mmp/clock-pxa168.c #define APBC_SSP4 APBC_REG(0x858) APBC_REG 34 arch/arm/mach-mmp/clock-pxa168.c #define APBC_SSP5 APBC_REG(0x85c) APBC_REG 18 arch/arm/mach-mmp/clock-pxa910.c #define APBC_UART0 APBC_REG(0x000) APBC_REG 19 arch/arm/mach-mmp/clock-pxa910.c #define APBC_UART1 APBC_REG(0x004) APBC_REG 20 arch/arm/mach-mmp/clock-pxa910.c #define APBC_GPIO APBC_REG(0x008) APBC_REG 21 arch/arm/mach-mmp/clock-pxa910.c #define APBC_PWM1 APBC_REG(0x00c) APBC_REG 22 arch/arm/mach-mmp/clock-pxa910.c #define APBC_PWM2 APBC_REG(0x010) APBC_REG 23 arch/arm/mach-mmp/clock-pxa910.c #define APBC_PWM3 APBC_REG(0x014) APBC_REG 24 arch/arm/mach-mmp/clock-pxa910.c #define APBC_PWM4 APBC_REG(0x018) APBC_REG 25 arch/arm/mach-mmp/clock-pxa910.c #define APBC_SSP1 APBC_REG(0x01c) APBC_REG 26 arch/arm/mach-mmp/clock-pxa910.c #define APBC_SSP2 APBC_REG(0x020) APBC_REG 27 arch/arm/mach-mmp/clock-pxa910.c #define APBC_RTC APBC_REG(0x028) APBC_REG 28 arch/arm/mach-mmp/clock-pxa910.c #define APBC_TWSI0 APBC_REG(0x02c) APBC_REG 29 arch/arm/mach-mmp/clock-pxa910.c #define APBC_KPC APBC_REG(0x030) APBC_REG 30 arch/arm/mach-mmp/clock-pxa910.c #define APBC_SSP3 APBC_REG(0x04c) APBC_REG 31 arch/arm/mach-mmp/clock-pxa910.c #define APBC_TWSI1 APBC_REG(0x06c) APBC_REG 119 arch/arm/mach-mmp/mmp2.c #define APBC_TIMERS APBC_REG(0x024) APBC_REG 66 arch/arm/mach-mmp/pxa168.c #define APBC_TIMERS APBC_REG(0x34) APBC_REG 108 arch/arm/mach-mmp/pxa910.c #define APBC_TIMERS APBC_REG(0x34)