IA32_EBX         1224 arch/x86/net/bpf_jit_comp32.c 	EMIT2(0x31, add_2reg(0xC0, IA32_EBX, IA32_EBX));
IA32_EBX         1228 arch/x86/net/bpf_jit_comp32.c 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(fphi));
IA32_EBX         1233 arch/x86/net/bpf_jit_comp32.c 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(r1[1]));
IA32_EBX         1236 arch/x86/net/bpf_jit_comp32.c 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[0]));
IA32_EBX         1237 arch/x86/net/bpf_jit_comp32.c 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));
IA32_EBX         1259 arch/x86/net/bpf_jit_comp32.c 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), -12);
IA32_EBX         1316 arch/x86/net/bpf_jit_comp32.c 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));
IA32_EBX         1319 arch/x86/net/bpf_jit_comp32.c 	EMIT3(0x83, add_1reg(0xF8, IA32_EBX), hi);
IA32_EBX         1330 arch/x86/net/bpf_jit_comp32.c 	EMIT3(0x83, add_1reg(0xD0, IA32_EBX), 0x00);
IA32_EBX         1335 arch/x86/net/bpf_jit_comp32.c 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));
IA32_EBX         1950 arch/x86/net/bpf_jit_comp32.c 			u8 sreg_hi = sstk ? IA32_EBX : src_hi;
IA32_EBX         1968 arch/x86/net/bpf_jit_comp32.c 						       IA32_EBX),
IA32_EBX         1988 arch/x86/net/bpf_jit_comp32.c 			u8 sreg_hi = sstk ? IA32_EBX : src_hi;
IA32_EBX         2004 arch/x86/net/bpf_jit_comp32.c 					       IA32_EBX),
IA32_EBX         2021 arch/x86/net/bpf_jit_comp32.c 			u8 sreg_hi = sstk ? IA32_EBX : src_hi;
IA32_EBX         2046 arch/x86/net/bpf_jit_comp32.c 						       IA32_EBX),
IA32_EBX         2065 arch/x86/net/bpf_jit_comp32.c 			u8 sreg_hi = IA32_EBX;
IA32_EBX         2121 arch/x86/net/bpf_jit_comp32.c 			u8 sreg_hi = IA32_EBX;
IA32_EBX         2139 arch/x86/net/bpf_jit_comp32.c 				EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EBX), hi);
IA32_EBX         2168 arch/x86/net/bpf_jit_comp32.c 			u8 sreg_hi = IA32_EBX;
IA32_EBX         2184 arch/x86/net/bpf_jit_comp32.c 			EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EBX), hi);