I915_TILING_Y    2431 drivers/gpu/drm/i915/display/intel_display.c 		return I915_TILING_Y;
I915_TILING_Y    3082 drivers/gpu/drm/i915/display/intel_display.c 	case I915_TILING_Y:
I915_TILING_Y    9849 drivers/gpu/drm/i915/display/intel_display.c 		plane_config->tiling = I915_TILING_Y;
I915_TILING_Y    15625 drivers/gpu/drm/i915/display/intel_display.c 		} else if (tiling == I915_TILING_Y) {
I915_TILING_Y     195 drivers/gpu/drm/i915/gem/i915_gem_object.h 	return tiling == I915_TILING_Y ? 32 : 8;
I915_TILING_Y     148 drivers/gpu/drm/i915/gem/i915_gem_tiling.c 	    (tiling == I915_TILING_Y && HAS_128_BYTE_Y_TILING(i915)))
I915_TILING_Y     420 drivers/gpu/drm/i915/gem/i915_gem_tiling.c 	case I915_TILING_Y:
I915_TILING_Y     227 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 	for (tiling = I915_TILING_X; tiling <= I915_TILING_Y; tiling++) {
I915_TILING_Y     246 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 		case I915_TILING_Y:
I915_TILING_Y     260 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 		} else if (tile.tiling == I915_TILING_Y &&
I915_TILING_Y    1154 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	err = i915_gem_object_set_tiling(arg->vma->obj, I915_TILING_Y, 512);
I915_TILING_Y     182 drivers/gpu/drm/i915/gvt/dmabuf.c 			tiling_mode = I915_TILING_Y;
I915_TILING_Y      91 drivers/gpu/drm/i915/i915_debugfs.c 	case I915_TILING_Y: return 'Y';
I915_TILING_Y      92 drivers/gpu/drm/i915/i915_gem_fence_reg.c 		if (i915_gem_object_get_tiling(vma->obj) == I915_TILING_Y)
I915_TILING_Y     127 drivers/gpu/drm/i915/i915_gem_fence_reg.c 		bool is_y_tiled = tiling == I915_TILING_Y;
I915_TILING_Y     175 drivers/gpu/drm/i915/i915_gem_fence_reg.c 		if (i915_gem_object_get_tiling(vma->obj) == I915_TILING_Y)
I915_TILING_Y    1268 include/uapi/drm/i915_drm.h #define I915_TILING_LAST	I915_TILING_Y
I915_TILING_Y    1268 tools/include/uapi/drm/i915_drm.h #define I915_TILING_LAST	I915_TILING_Y