I915_READ_FW 343 drivers/gpu/drm/i915/display/intel_gmbus.c ret = wait_for_us((gmbus2 = I915_READ_FW(GMBUS2)) & status, 2); I915_READ_FW 345 drivers/gpu/drm/i915/display/intel_gmbus.c ret = wait_for((gmbus2 = I915_READ_FW(GMBUS2)) & status, 50); I915_READ_FW 424 drivers/gpu/drm/i915/display/intel_gmbus.c val = I915_READ_FW(GMBUS3); I915_READ_FW 177 drivers/gpu/drm/i915/gvt/mmio_context.c I915_READ_FW(offset); I915_READ_FW 185 drivers/gpu/drm/i915/gvt/mmio_context.c I915_READ_FW(offset); I915_READ_FW 494 drivers/gpu/drm/i915/gvt/mmio_context.c vgpu_vreg_t(pre, mmio->reg) = I915_READ_FW(mmio->reg); I915_READ_FW 500 drivers/gpu/drm/i915/gvt/mmio_context.c old_v = mmio->value = I915_READ_FW(mmio->reg); I915_READ_FW 219 drivers/gpu/drm/i915/gvt/scheduler.c vgpu_vreg(vgpu, i915_mmio_reg_offset(reg)) = I915_READ_FW(reg); I915_READ_FW 221 drivers/gpu/drm/i915/gvt/scheduler.c vgpu_vreg(vgpu, i915_mmio_reg_offset(reg)) = I915_READ_FW(reg); I915_READ_FW 223 drivers/gpu/drm/i915/gvt/scheduler.c vgpu_vreg(vgpu, i915_mmio_reg_offset(reg)) = I915_READ_FW(reg); I915_READ_FW 1195 drivers/gpu/drm/i915/i915_debugfs.c gt_core_status = I915_READ_FW(GEN6_GT_CORE_STATUS); I915_READ_FW 1756 drivers/gpu/drm/i915/i915_debugfs.c rpup = I915_READ_FW(GEN6_RP_CUR_UP) & GEN6_RP_EI_MASK; I915_READ_FW 1757 drivers/gpu/drm/i915/i915_debugfs.c rpupei = I915_READ_FW(GEN6_RP_CUR_UP_EI) & GEN6_RP_EI_MASK; I915_READ_FW 1758 drivers/gpu/drm/i915/i915_debugfs.c rpdown = I915_READ_FW(GEN6_RP_CUR_DOWN) & GEN6_RP_EI_MASK; I915_READ_FW 1759 drivers/gpu/drm/i915/i915_debugfs.c rpdownei = I915_READ_FW(GEN6_RP_CUR_DOWN_EI) & GEN6_RP_EI_MASK; I915_READ_FW 807 drivers/gpu/drm/i915/i915_irq.c high1 = I915_READ_FW(high_frame) & PIPE_FRAME_HIGH_MASK; I915_READ_FW 808 drivers/gpu/drm/i915/i915_irq.c low = I915_READ_FW(low_frame); I915_READ_FW 809 drivers/gpu/drm/i915/i915_irq.c high2 = I915_READ_FW(high_frame) & PIPE_FRAME_HIGH_MASK; I915_READ_FW 866 drivers/gpu/drm/i915/i915_irq.c scan_prev_time = I915_READ_FW(PIPE_FRMTMSTMP(crtc->pipe)); I915_READ_FW 872 drivers/gpu/drm/i915/i915_irq.c scan_curr_time = I915_READ_FW(IVB_TIMESTAMP_CTR); I915_READ_FW 874 drivers/gpu/drm/i915/i915_irq.c scan_post_time = I915_READ_FW(PIPE_FRMTMSTMP(crtc->pipe)); I915_READ_FW 909 drivers/gpu/drm/i915/i915_irq.c position = I915_READ_FW(PIPEDSL(pipe)) & DSL_LINEMASK_GEN2; I915_READ_FW 911 drivers/gpu/drm/i915/i915_irq.c position = I915_READ_FW(PIPEDSL(pipe)) & DSL_LINEMASK_GEN3; I915_READ_FW 930 drivers/gpu/drm/i915/i915_irq.c temp = I915_READ_FW(PIPEDSL(pipe)) & DSL_LINEMASK_GEN3; I915_READ_FW 1001 drivers/gpu/drm/i915/i915_irq.c position = (I915_READ_FW(PIPEFRAMEPIXEL(pipe)) & PIPE_PIXEL_MASK) >> PIPE_PIXEL_SHIFT; I915_READ_FW 9954 drivers/gpu/drm/i915/intel_pm.c upper = I915_READ_FW(reg); I915_READ_FW 9960 drivers/gpu/drm/i915/intel_pm.c lower = I915_READ_FW(reg); I915_READ_FW 9964 drivers/gpu/drm/i915/intel_pm.c upper = I915_READ_FW(reg); I915_READ_FW 284 drivers/gpu/drm/i915/selftests/intel_uncore.c (void)I915_READ_FW(reg);