I915_DISPATCH_SECURE 1192 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c cache->gen > 5 ? 0 : I915_DISPATCH_SECURE); I915_DISPATCH_SECURE 2047 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c eb->batch_flags |= I915_DISPATCH_SECURE; I915_DISPATCH_SECURE 2525 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c eb.batch_flags |= I915_DISPATCH_SECURE; I915_DISPATCH_SECURE 2617 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (eb.batch_flags & I915_DISPATCH_SECURE) { I915_DISPATCH_SECURE 2708 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c if (eb.batch_flags & I915_DISPATCH_SECURE) I915_DISPATCH_SECURE 133 drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c flags |= I915_DISPATCH_SECURE; I915_DISPATCH_SECURE 2692 drivers/gpu/drm/i915/gt/intel_lrc.c (flags & I915_DISPATCH_SECURE ? 0 : BIT(8)); I915_DISPATCH_SECURE 2714 drivers/gpu/drm/i915/gt/intel_lrc.c (flags & I915_DISPATCH_SECURE ? 0 : BIT(8)); I915_DISPATCH_SECURE 212 drivers/gpu/drm/i915/gt/intel_renderstate.c I915_DISPATCH_SECURE); I915_DISPATCH_SECURE 219 drivers/gpu/drm/i915/gt/intel_renderstate.c I915_DISPATCH_SECURE); I915_DISPATCH_SECURE 1094 drivers/gpu/drm/i915/gt/intel_ringbuffer.c I915_DISPATCH_SECURE ? 0 : MI_BATCH_NON_SECURE_I965); I915_DISPATCH_SECURE 1161 drivers/gpu/drm/i915/gt/intel_ringbuffer.c *cs++ = offset | (dispatch_flags & I915_DISPATCH_SECURE ? 0 : I915_DISPATCH_SECURE 1180 drivers/gpu/drm/i915/gt/intel_ringbuffer.c *cs++ = offset | (dispatch_flags & I915_DISPATCH_SECURE ? 0 : I915_DISPATCH_SECURE 2102 drivers/gpu/drm/i915/gt/intel_ringbuffer.c *cs++ = MI_BATCH_BUFFER_START | (dispatch_flags & I915_DISPATCH_SECURE ? I915_DISPATCH_SECURE 2122 drivers/gpu/drm/i915/gt/intel_ringbuffer.c *cs++ = MI_BATCH_BUFFER_START | (dispatch_flags & I915_DISPATCH_SECURE ? I915_DISPATCH_SECURE 254 drivers/gpu/drm/i915/gt/selftest_hangcheck.c flags |= I915_DISPATCH_SECURE; I915_DISPATCH_SECURE 671 drivers/gpu/drm/i915/selftests/i915_request.c I915_DISPATCH_SECURE);