Hit_Invalidate_I   75 arch/mips/include/asm/r4kcache.h 		cache_op(Hit_Invalidate_I, addr);
Hit_Invalidate_I  157 arch/mips/include/asm/r4kcache.h 		return protected_cachee_op(Hit_Invalidate_I, addr);
Hit_Invalidate_I  159 arch/mips/include/asm/r4kcache.h 		return protected_cache_op(Hit_Invalidate_I, addr);
Hit_Invalidate_I  572 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, )
Hit_Invalidate_I  575 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, )
Hit_Invalidate_I  579 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, )
Hit_Invalidate_I  582 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, )
Hit_Invalidate_I  606 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16)
Hit_Invalidate_I  609 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32)
Hit_Invalidate_I  612 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
Hit_Invalidate_I  634 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, )
Hit_Invalidate_I  665 arch/mips/include/asm/r4kcache.h __BUILD_PROT_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I)
Hit_Invalidate_I  672 arch/mips/include/asm/r4kcache.h __BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , )
Hit_Invalidate_I 1899 arch/mips/kvm/emulate.c 	} else if (op_inst == Hit_Invalidate_I) {
Hit_Invalidate_I 1108 arch/mips/kvm/vz.c 	case Hit_Invalidate_I: