HWS_SF 450 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(blk, CLOCK_CONTROL, DCFE_CLOCK_ENABLE, mask_sh),\ HWS_SF 454 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(blk, V_UPDATE_LOCK, BLND_DCP_GRPH_V_UPDATE_LOCK, mask_sh),\ HWS_SF 455 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(blk, V_UPDATE_LOCK, BLND_SCL_V_UPDATE_LOCK, mask_sh),\ HWS_SF 456 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(blk, V_UPDATE_LOCK, BLND_DCP_GRPH_SURF_V_UPDATE_LOCK, mask_sh),\ HWS_SF 457 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(blk, V_UPDATE_LOCK, BLND_BLND_V_UPDATE_LOCK, mask_sh),\ HWS_SF 458 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(blk, V_UPDATE_LOCK, BLND_V_UPDATE_LOCK_MODE, mask_sh),\ HWS_SF 459 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(blk, CONTROL, BLND_FEEDTHROUGH_EN, mask_sh),\ HWS_SF 460 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(blk, CONTROL, BLND_ALPHA_MODE, mask_sh),\ HWS_SF 461 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(blk, CONTROL, BLND_MODE, mask_sh),\ HWS_SF 462 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(blk, CONTROL, BLND_MULTIPLIED_MODE, mask_sh) HWS_SF 466 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(blk, PIXEL_RATE_CNTL, DP_DTO0_ENABLE, mask_sh) HWS_SF 473 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh),\ HWS_SF 474 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_DIGON, mask_sh),\ HWS_SF 475 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_DIGON_OVRD, mask_sh),\ HWS_SF 476 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, mask_sh) HWS_SF 480 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(BLND_, V_UPDATE_LOCK, BLND_DCP_GRPH_V_UPDATE_LOCK, mask_sh),\ HWS_SF 481 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(BLND_, V_UPDATE_LOCK, BLND_SCL_V_UPDATE_LOCK, mask_sh),\ HWS_SF 482 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(BLND_, V_UPDATE_LOCK, BLND_DCP_GRPH_SURF_V_UPDATE_LOCK, mask_sh),\ HWS_SF 483 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(BLND_, CONTROL, BLND_MODE, mask_sh),\ HWS_SF 519 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, MC_VM_XGMI_LFB_CNTL, PF_LFB_REGION, mask_sh),\ HWS_SF 520 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, MC_VM_XGMI_LFB_CNTL, PF_MAX_REGION, mask_sh) HWS_SF 525 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \ HWS_SF 526 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCFCLK_CNTL, DCFCLK_GATE_DIS, mask_sh), \ HWS_SF 527 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DC_MEM_GLOBAL_PWR_REQ_CNTL, DC_MEM_GLOBAL_PWR_REQ_DIS, mask_sh) HWS_SF 532 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCHUBBUB_SDPIF_FB_BASE, SDPIF_FB_BASE, mask_sh), \ HWS_SF 533 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCHUBBUB_SDPIF_FB_OFFSET, SDPIF_FB_OFFSET, mask_sh), \ HWS_SF 534 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCHUBBUB_SDPIF_AGP_BASE, SDPIF_AGP_BASE, mask_sh), \ HWS_SF 535 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCHUBBUB_SDPIF_AGP_BOT, SDPIF_AGP_BOT, mask_sh), \ HWS_SF 536 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCHUBBUB_SDPIF_AGP_TOP, SDPIF_AGP_TOP, mask_sh), \ HWS_SF 538 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, PAGE_DIRECTORY_ENTRY_HI32, mask_sh),\ HWS_SF 539 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, PAGE_DIRECTORY_ENTRY_LO32, mask_sh),\ HWS_SF 540 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, VM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, LOGICAL_PAGE_NUMBER_HI4, mask_sh),\ HWS_SF 541 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, LOGICAL_PAGE_NUMBER_LO32, mask_sh),\ HWS_SF 542 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, VM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32, PHYSICAL_PAGE_ADDR_HI4, mask_sh),\ HWS_SF 543 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, VM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32, PHYSICAL_PAGE_ADDR_LO32, mask_sh),\ HWS_SF 544 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, PHYSICAL_PAGE_NUMBER_MSB, mask_sh),\ HWS_SF 545 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, PHYSICAL_PAGE_NUMBER_LSB, mask_sh),\ HWS_SF 546 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, MC_VM_SYSTEM_APERTURE_LOW_ADDR, LOGICAL_ADDR, mask_sh),\ HWS_SF 547 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN0_PG_CONFIG, DOMAIN0_POWER_FORCEON, mask_sh), \ HWS_SF 548 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN0_PG_CONFIG, DOMAIN0_POWER_GATE, mask_sh), \ HWS_SF 549 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, mask_sh), \ HWS_SF 550 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_GATE, mask_sh), \ HWS_SF 551 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN2_PG_CONFIG, DOMAIN2_POWER_FORCEON, mask_sh), \ HWS_SF 552 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN2_PG_CONFIG, DOMAIN2_POWER_GATE, mask_sh), \ HWS_SF 553 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_FORCEON, mask_sh), \ HWS_SF 554 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_GATE, mask_sh), \ HWS_SF 555 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN4_PG_CONFIG, DOMAIN4_POWER_FORCEON, mask_sh), \ HWS_SF 556 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN4_PG_CONFIG, DOMAIN4_POWER_GATE, mask_sh), \ HWS_SF 557 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN5_PG_CONFIG, DOMAIN5_POWER_FORCEON, mask_sh), \ HWS_SF 558 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN5_PG_CONFIG, DOMAIN5_POWER_GATE, mask_sh), \ HWS_SF 559 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN6_PG_CONFIG, DOMAIN6_POWER_FORCEON, mask_sh), \ HWS_SF 560 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN6_PG_CONFIG, DOMAIN6_POWER_GATE, mask_sh), \ HWS_SF 561 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN7_PG_CONFIG, DOMAIN7_POWER_FORCEON, mask_sh), \ HWS_SF 562 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN7_PG_CONFIG, DOMAIN7_POWER_GATE, mask_sh), \ HWS_SF 563 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN0_PG_STATUS, DOMAIN0_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 564 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN1_PG_STATUS, DOMAIN1_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 565 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN2_PG_STATUS, DOMAIN2_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 566 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN3_PG_STATUS, DOMAIN3_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 567 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN4_PG_STATUS, DOMAIN4_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 568 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN5_PG_STATUS, DOMAIN5_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 569 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN6_PG_STATUS, DOMAIN6_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 570 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN7_PG_STATUS, DOMAIN7_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 571 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \ HWS_SF 572 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, D1VGA_CONTROL, D1VGA_MODE_ENABLE, mask_sh),\ HWS_SF 573 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, D2VGA_CONTROL, D2VGA_MODE_ENABLE, mask_sh),\ HWS_SF 574 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, D3VGA_CONTROL, D3VGA_MODE_ENABLE, mask_sh),\ HWS_SF 575 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, D4VGA_CONTROL, D4VGA_MODE_ENABLE, mask_sh),\ HWS_SF 576 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, VGA_TEST_CONTROL, VGA_TEST_ENABLE, mask_sh),\ HWS_SF 577 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, VGA_TEST_CONTROL, VGA_TEST_RENDER_START, mask_sh),\ HWS_SF 583 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \ HWS_SF 584 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN0_PG_CONFIG, DOMAIN0_POWER_FORCEON, mask_sh), \ HWS_SF 585 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN0_PG_CONFIG, DOMAIN0_POWER_GATE, mask_sh), \ HWS_SF 586 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, mask_sh), \ HWS_SF 587 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_GATE, mask_sh), \ HWS_SF 588 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN2_PG_CONFIG, DOMAIN2_POWER_FORCEON, mask_sh), \ HWS_SF 589 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN2_PG_CONFIG, DOMAIN2_POWER_GATE, mask_sh), \ HWS_SF 590 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_FORCEON, mask_sh), \ HWS_SF 591 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_GATE, mask_sh), \ HWS_SF 592 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN4_PG_CONFIG, DOMAIN4_POWER_FORCEON, mask_sh), \ HWS_SF 593 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN4_PG_CONFIG, DOMAIN4_POWER_GATE, mask_sh), \ HWS_SF 594 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN5_PG_CONFIG, DOMAIN5_POWER_FORCEON, mask_sh), \ HWS_SF 595 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN5_PG_CONFIG, DOMAIN5_POWER_GATE, mask_sh), \ HWS_SF 596 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN6_PG_CONFIG, DOMAIN6_POWER_FORCEON, mask_sh), \ HWS_SF 597 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN6_PG_CONFIG, DOMAIN6_POWER_GATE, mask_sh), \ HWS_SF 598 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN7_PG_CONFIG, DOMAIN7_POWER_FORCEON, mask_sh), \ HWS_SF 599 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN7_PG_CONFIG, DOMAIN7_POWER_GATE, mask_sh), \ HWS_SF 600 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN8_PG_CONFIG, DOMAIN8_POWER_FORCEON, mask_sh), \ HWS_SF 601 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN8_PG_CONFIG, DOMAIN8_POWER_GATE, mask_sh), \ HWS_SF 602 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN9_PG_CONFIG, DOMAIN9_POWER_FORCEON, mask_sh), \ HWS_SF 603 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN9_PG_CONFIG, DOMAIN9_POWER_GATE, mask_sh), \ HWS_SF 604 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN10_PG_CONFIG, DOMAIN10_POWER_FORCEON, mask_sh), \ HWS_SF 605 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN10_PG_CONFIG, DOMAIN10_POWER_GATE, mask_sh), \ HWS_SF 606 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN11_PG_CONFIG, DOMAIN11_POWER_FORCEON, mask_sh), \ HWS_SF 607 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN11_PG_CONFIG, DOMAIN11_POWER_GATE, mask_sh), \ HWS_SF 608 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN16_POWER_FORCEON, mask_sh), \ HWS_SF 609 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN16_POWER_GATE, mask_sh), \ HWS_SF 610 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN17_PG_CONFIG, DOMAIN17_POWER_FORCEON, mask_sh), \ HWS_SF 611 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN17_PG_CONFIG, DOMAIN17_POWER_GATE, mask_sh), \ HWS_SF 612 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN18_PG_CONFIG, DOMAIN18_POWER_FORCEON, mask_sh), \ HWS_SF 613 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN18_PG_CONFIG, DOMAIN18_POWER_GATE, mask_sh), \ HWS_SF 614 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN19_PG_CONFIG, DOMAIN19_POWER_FORCEON, mask_sh), \ HWS_SF 615 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN19_PG_CONFIG, DOMAIN19_POWER_GATE, mask_sh), \ HWS_SF 616 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN20_PG_CONFIG, DOMAIN20_POWER_FORCEON, mask_sh), \ HWS_SF 617 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN20_PG_CONFIG, DOMAIN20_POWER_GATE, mask_sh), \ HWS_SF 618 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN21_PG_CONFIG, DOMAIN21_POWER_FORCEON, mask_sh), \ HWS_SF 619 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN21_PG_CONFIG, DOMAIN21_POWER_GATE, mask_sh), \ HWS_SF 620 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN0_PG_STATUS, DOMAIN0_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 621 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN1_PG_STATUS, DOMAIN1_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 622 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN2_PG_STATUS, DOMAIN2_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 623 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN3_PG_STATUS, DOMAIN3_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 624 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN4_PG_STATUS, DOMAIN4_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 625 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN5_PG_STATUS, DOMAIN5_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 626 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN6_PG_STATUS, DOMAIN6_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 627 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN7_PG_STATUS, DOMAIN7_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 628 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN8_PG_STATUS, DOMAIN8_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 629 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN9_PG_STATUS, DOMAIN9_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 630 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN10_PG_STATUS, DOMAIN10_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 631 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN11_PG_STATUS, DOMAIN11_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 632 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN16_PG_STATUS, DOMAIN16_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 633 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN17_PG_STATUS, DOMAIN17_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 634 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN18_PG_STATUS, DOMAIN18_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 635 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN19_PG_STATUS, DOMAIN19_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 636 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN20_PG_STATUS, DOMAIN20_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 637 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN21_PG_STATUS, DOMAIN21_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 638 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \ HWS_SF 645 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \ HWS_SF 646 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, MMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, PAGE_DIRECTORY_ENTRY_HI32, mask_sh),\ HWS_SF 647 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, MMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, PAGE_DIRECTORY_ENTRY_LO32, mask_sh),\ HWS_SF 648 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN0_PG_CONFIG, DOMAIN0_POWER_FORCEON, mask_sh), \ HWS_SF 649 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN0_PG_CONFIG, DOMAIN0_POWER_GATE, mask_sh), \ HWS_SF 650 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_FORCEON, mask_sh), \ HWS_SF 651 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN1_PG_CONFIG, DOMAIN1_POWER_GATE, mask_sh), \ HWS_SF 652 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN2_PG_CONFIG, DOMAIN2_POWER_FORCEON, mask_sh), \ HWS_SF 653 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN2_PG_CONFIG, DOMAIN2_POWER_GATE, mask_sh), \ HWS_SF 654 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_FORCEON, mask_sh), \ HWS_SF 655 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN3_PG_CONFIG, DOMAIN3_POWER_GATE, mask_sh), \ HWS_SF 656 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN4_PG_CONFIG, DOMAIN4_POWER_FORCEON, mask_sh), \ HWS_SF 657 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN4_PG_CONFIG, DOMAIN4_POWER_GATE, mask_sh), \ HWS_SF 658 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN5_PG_CONFIG, DOMAIN5_POWER_FORCEON, mask_sh), \ HWS_SF 659 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN5_PG_CONFIG, DOMAIN5_POWER_GATE, mask_sh), \ HWS_SF 660 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN6_PG_CONFIG, DOMAIN6_POWER_FORCEON, mask_sh), \ HWS_SF 661 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN6_PG_CONFIG, DOMAIN6_POWER_GATE, mask_sh), \ HWS_SF 662 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN7_PG_CONFIG, DOMAIN7_POWER_FORCEON, mask_sh), \ HWS_SF 663 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN7_PG_CONFIG, DOMAIN7_POWER_GATE, mask_sh), \ HWS_SF 664 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN16_POWER_FORCEON, mask_sh), \ HWS_SF 665 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN16_PG_CONFIG, DOMAIN16_POWER_GATE, mask_sh), \ HWS_SF 666 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN17_PG_CONFIG, DOMAIN17_POWER_FORCEON, mask_sh), \ HWS_SF 667 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN17_PG_CONFIG, DOMAIN17_POWER_GATE, mask_sh), \ HWS_SF 668 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN18_PG_CONFIG, DOMAIN18_POWER_FORCEON, mask_sh), \ HWS_SF 669 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN18_PG_CONFIG, DOMAIN18_POWER_GATE, mask_sh), \ HWS_SF 670 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN0_PG_STATUS, DOMAIN0_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 671 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN1_PG_STATUS, DOMAIN1_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 672 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN2_PG_STATUS, DOMAIN2_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 673 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN3_PG_STATUS, DOMAIN3_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 674 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN4_PG_STATUS, DOMAIN4_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 675 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN5_PG_STATUS, DOMAIN5_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 676 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN6_PG_STATUS, DOMAIN6_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 677 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN7_PG_STATUS, DOMAIN7_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 678 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN16_PG_STATUS, DOMAIN16_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 679 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN17_PG_STATUS, DOMAIN17_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 680 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DOMAIN18_PG_STATUS, DOMAIN18_PGFSM_PWR_STATUS, mask_sh), \ HWS_SF 681 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \ HWS_SF 682 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh), \ HWS_SF 683 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h HWS_SF(, LVTMA_PWRSEQ_STATE, LVTMA_PWRSEQ_TARGET_STATE_R, mask_sh)