HWBLK_TSIF        177 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[HWBLK_TSIF]   = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 22, 0),
HWBLK_TSIF        240 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
HWBLK_TSIF        239 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	[HWBLK_TSIF] = SH_CLK_MSTP32(&div4_clks[DIV4_B],    MSTPCR2, 22, 0),
HWBLK_TSIF        320 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),