HWBLK_TPU         175 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[HWBLK_TPU]    = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 25, 0),
HWBLK_TPU         238 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
HWBLK_TPU         237 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	[HWBLK_TPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B],	    MSTPCR2, 25, 0),
HWBLK_TPU         318 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),