HWBLK_TMU1        158 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[HWBLK_TMU1]   = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR0, 11, 0),
HWBLK_TMU1        256 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[HWBLK_TMU1]),
HWBLK_TMU1        219 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	[HWBLK_TMU1] = SH_CLK_MSTP32(&div4_clks[DIV4_P],    MSTPCR0, 10, 0),
HWBLK_TMU1        296 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[HWBLK_TMU1]),