HWBLK_TMU0        154 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[HWBLK_TMU0]   = SH_CLK_MSTP32(&div4_clks[DIV4_P],  MSTPCR0, 15, 0),
HWBLK_TMU0        255 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU0]),
HWBLK_TMU0        215 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	[HWBLK_TMU0] = SH_CLK_MSTP32(&div4_clks[DIV4_P],    MSTPCR0, 15, 0),
HWBLK_TMU0        295 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU0]),