HWBLK_TMU 144 arch/sh/kernel/cpu/sh4a/clock-sh7722.c [HWBLK_TMU] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), HWBLK_TMU 194 arch/sh/kernel/cpu/sh4a/clock-sh7722.c CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU]),