HWBLK_TLB         143 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[HWBLK_TLB]    = SH_CLK_MSTP32(&div4_clks[DIV4_I],  MSTPCR0, 31, CLK_ENABLE_ON_INIT),
HWBLK_TLB         216 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
HWBLK_TLB         203 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	[HWBLK_TLB] = SH_CLK_MSTP32(&div4_clks[DIV4_I],	    MSTPCR0, 31, CLK_ENABLE_ON_INIT),
HWBLK_TLB         282 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),