HWBLK_SDHI1       180 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[HWBLK_SDHI1]  = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 17, 0),
HWBLK_SDHI1       243 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]),
HWBLK_SDHI1       244 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	[HWBLK_SDHI1] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR2, 17, 0),
HWBLK_SDHI1       327 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]),