HWBLK_SDHI0       179 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[HWBLK_SDHI0]  = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR2, 18, 0),
HWBLK_SDHI0       242 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]),
HWBLK_SDHI0       243 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	[HWBLK_SDHI0] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR2, 18, 0),
HWBLK_SDHI0       326 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]),