HWBLK_OC          145 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[HWBLK_OC]     = SH_CLK_MSTP32(&div4_clks[DIV4_I],  MSTPCR0, 29, CLK_ENABLE_ON_INIT),
HWBLK_OC          218 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
HWBLK_OC          205 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	[HWBLK_OC] = SH_CLK_MSTP32(&div4_clks[DIV4_I],	    MSTPCR0, 29, CLK_ENABLE_ON_INIT),
HWBLK_OC          284 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),