HWBLK_INTC        149 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[HWBLK_INTC]   = SH_CLK_MSTP32(&div4_clks[DIV4_I],  MSTPCR0, 22, CLK_ENABLE_ON_INIT),
HWBLK_INTC        222 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
HWBLK_INTC        210 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	[HWBLK_INTC] = SH_CLK_MSTP32(&div4_clks[DIV4_P],    MSTPCR0, 22, CLK_ENABLE_ON_INIT),
HWBLK_INTC        289 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),