HWBLK_DMAC0       150 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[HWBLK_DMAC0]  = SH_CLK_MSTP32(&div4_clks[DIV4_B],  MSTPCR0, 21, 0),
HWBLK_DMAC0       223 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[HWBLK_DMAC0]),
HWBLK_DMAC0       211 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	[HWBLK_DMAC0] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   MSTPCR0, 21, 0),
HWBLK_DMAC0       290 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 	CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[HWBLK_DMAC0]),