HUDI 92 arch/sh/kernel/cpu/sh4/setup-sh4-202.c INTC_VECT(HUDI, 0x600), HUDI 105 arch/sh/kernel/cpu/sh4/setup-sh4-202.c { 0xffd0000c, 0, 16, 4, /* IPRC */ { 0, 0, SCIF, HUDI } }, HUDI 191 arch/sh/kernel/cpu/sh4/setup-sh7750.c INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620), HUDI 207 arch/sh/kernel/cpu/sh4/setup-sh7750.c { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, SCIF, HUDI } }, HUDI 43 arch/sh/kernel/cpu/sh4/setup-sh7760.c INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620), HUDI 105 arch/sh/kernel/cpu/sh4/setup-sh7760.c { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, 0, HUDI } }, HUDI 380 arch/sh/kernel/cpu/sh4a/setup-sh7734.c INTC_VECT(HUDI, 0x600), HUDI 489 arch/sh/kernel/cpu/sh4a/setup-sh7734.c HUDI, HUDI 504 arch/sh/kernel/cpu/sh4a/setup-sh7734.c { HUDI, SHDMAC, USB, SSI } }, HUDI 848 arch/sh/kernel/cpu/sh4a/setup-sh7757.c INTC_VECT(HUDI, 0x600), HUDI 967 arch/sh/kernel/cpu/sh4a/setup-sh7757.c HUDI, 0, 0, SCIF3, SCIF2, SDHI, TMU345, TMU012 HUDI 1063 arch/sh/kernel/cpu/sh4a/setup-sh7757.c { INT2PRI3, 0, 32, 8, { HUDI, DMAC0_5, ADC0, IRQ9 } }, HUDI 257 arch/sh/kernel/cpu/sh4a/setup-sh7763.c INTC_VECT(TMU2_TICPI, 0x5e0), INTC_VECT(HUDI, 0x600), HUDI 305 arch/sh/kernel/cpu/sh4a/setup-sh7763.c HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } }, HUDI 318 arch/sh/kernel/cpu/sh4a/setup-sh7763.c { 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { HUDI, DMAC, ADC } }, HUDI 366 arch/sh/kernel/cpu/sh4a/setup-sh7770.c INTC_VECT(HUDI, 0x600), INTC_VECT(I2C, 0x620), HUDI 424 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DMAC, I2C, HUDI, SPDIF, IPI, HAC, TMU, GPIO } }, HUDI 429 arch/sh/kernel/cpu/sh4a/setup-sh7770.c { 0xffe00004, 0, 32, 8, /* INT2PRI1 */ { IPI, SPDIF, HUDI, I2C } }, HUDI 319 arch/sh/kernel/cpu/sh4a/setup-sh7780.c INTC_VECT(HUDI, 0x600), HUDI 359 arch/sh/kernel/cpu/sh4a/setup-sh7780.c HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } }, HUDI 367 arch/sh/kernel/cpu/sh4a/setup-sh7780.c { 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { HUDI, DMAC0, DMAC1 } }, HUDI 395 arch/sh/kernel/cpu/sh4a/setup-sh7785.c INTC_VECT(HUDI, 0x600), HUDI 454 arch/sh/kernel/cpu/sh4a/setup-sh7785.c PCIINTA, PCISERR, HAC1, HAC0, DMAC1, DMAC0, HUDI, WDT, HUDI 467 arch/sh/kernel/cpu/sh4a/setup-sh7785.c { 0xffd40010, 0, 32, 8, /* INT2PRI4 */ { HUDI, DMAC0, DMAC1, } },