HSW_TVIDEO_DIP_CTL  512 drivers/gpu/drm/i915/display/intel_hdmi.c 	i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder);
HSW_TVIDEO_DIP_CTL  547 drivers/gpu/drm/i915/display/intel_hdmi.c 	val = I915_READ(HSW_TVIDEO_DIP_CTL(cpu_transcoder));
HSW_TVIDEO_DIP_CTL  558 drivers/gpu/drm/i915/display/intel_hdmi.c 	u32 val = I915_READ(HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
HSW_TVIDEO_DIP_CTL 1189 drivers/gpu/drm/i915/display/intel_hdmi.c 	i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder);
HSW_TVIDEO_DIP_CTL 2434 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_A), D_ALL);
HSW_TVIDEO_DIP_CTL 2435 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_B), D_ALL);
HSW_TVIDEO_DIP_CTL 2436 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_C), D_ALL);