HSW_PWR_WELL_CTL_REQ  336 drivers/gpu/drm/i915/display/intel_display_power.c 	u32 req_mask = HSW_PWR_WELL_CTL_REQ(pw_idx);
HSW_PWR_WELL_CTL_REQ  408 drivers/gpu/drm/i915/display/intel_display_power.c 	I915_WRITE(regs->driver, val | HSW_PWR_WELL_CTL_REQ(pw_idx));
HSW_PWR_WELL_CTL_REQ  439 drivers/gpu/drm/i915/display/intel_display_power.c 	I915_WRITE(regs->driver, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
HSW_PWR_WELL_CTL_REQ  456 drivers/gpu/drm/i915/display/intel_display_power.c 	I915_WRITE(regs->driver, val | HSW_PWR_WELL_CTL_REQ(pw_idx));
HSW_PWR_WELL_CTL_REQ  495 drivers/gpu/drm/i915/display/intel_display_power.c 	I915_WRITE(regs->driver, val & ~HSW_PWR_WELL_CTL_REQ(pw_idx));
HSW_PWR_WELL_CTL_REQ  619 drivers/gpu/drm/i915/display/intel_display_power.c 	u32 mask = HSW_PWR_WELL_CTL_REQ(pw_idx) |
HSW_PWR_WELL_CTL_REQ  645 drivers/gpu/drm/i915/display/intel_display_power.c 		  HSW_PWR_WELL_CTL_REQ(SKL_PW_CTL_IDX_PW_2),
HSW_PWR_WELL_CTL_REQ  899 drivers/gpu/drm/i915/display/intel_display_power.c 	u32 mask = HSW_PWR_WELL_CTL_REQ(pw_idx);
HSW_PWR_WELL_CTL_REQ 1320 drivers/gpu/drm/i915/gvt/handlers.c 	    HSW_PWR_WELL_CTL_REQ(HSW_PW_CTL_IDX_GLOBAL))