HSFSTS_CTL_FCYCLE_SHIFT   31 drivers/mtd/spi-nor/intel-spi.c #define HSFSTS_CTL_FCYCLE_MASK		(0x0f << HSFSTS_CTL_FCYCLE_SHIFT)
HSFSTS_CTL_FCYCLE_SHIFT   33 drivers/mtd/spi-nor/intel-spi.c #define HSFSTS_CTL_FCYCLE_READ		(0x00 << HSFSTS_CTL_FCYCLE_SHIFT)
HSFSTS_CTL_FCYCLE_SHIFT   34 drivers/mtd/spi-nor/intel-spi.c #define HSFSTS_CTL_FCYCLE_WRITE		(0x02 << HSFSTS_CTL_FCYCLE_SHIFT)
HSFSTS_CTL_FCYCLE_SHIFT   35 drivers/mtd/spi-nor/intel-spi.c #define HSFSTS_CTL_FCYCLE_ERASE		(0x03 << HSFSTS_CTL_FCYCLE_SHIFT)
HSFSTS_CTL_FCYCLE_SHIFT   36 drivers/mtd/spi-nor/intel-spi.c #define HSFSTS_CTL_FCYCLE_ERASE_64K	(0x04 << HSFSTS_CTL_FCYCLE_SHIFT)
HSFSTS_CTL_FCYCLE_SHIFT   37 drivers/mtd/spi-nor/intel-spi.c #define HSFSTS_CTL_FCYCLE_RDID		(0x06 << HSFSTS_CTL_FCYCLE_SHIFT)
HSFSTS_CTL_FCYCLE_SHIFT   38 drivers/mtd/spi-nor/intel-spi.c #define HSFSTS_CTL_FCYCLE_WRSR		(0x07 << HSFSTS_CTL_FCYCLE_SHIFT)
HSFSTS_CTL_FCYCLE_SHIFT   39 drivers/mtd/spi-nor/intel-spi.c #define HSFSTS_CTL_FCYCLE_RDSR		(0x08 << HSFSTS_CTL_FCYCLE_SHIFT)