AMD_IOMMU_EVENT_DESC 103 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(mem_pass_untrans, "csource=0x01"), AMD_IOMMU_EVENT_DESC 104 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(mem_pass_pretrans, "csource=0x02"), AMD_IOMMU_EVENT_DESC 105 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(mem_pass_excl, "csource=0x03"), AMD_IOMMU_EVENT_DESC 106 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(mem_target_abort, "csource=0x04"), AMD_IOMMU_EVENT_DESC 107 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(mem_trans_total, "csource=0x05"), AMD_IOMMU_EVENT_DESC 108 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(mem_iommu_tlb_pte_hit, "csource=0x06"), AMD_IOMMU_EVENT_DESC 109 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(mem_iommu_tlb_pte_mis, "csource=0x07"), AMD_IOMMU_EVENT_DESC 110 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(mem_iommu_tlb_pde_hit, "csource=0x08"), AMD_IOMMU_EVENT_DESC 111 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(mem_iommu_tlb_pde_mis, "csource=0x09"), AMD_IOMMU_EVENT_DESC 112 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(mem_dte_hit, "csource=0x0a"), AMD_IOMMU_EVENT_DESC 113 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(mem_dte_mis, "csource=0x0b"), AMD_IOMMU_EVENT_DESC 114 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(page_tbl_read_tot, "csource=0x0c"), AMD_IOMMU_EVENT_DESC 115 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(page_tbl_read_nst, "csource=0x0d"), AMD_IOMMU_EVENT_DESC 116 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(page_tbl_read_gst, "csource=0x0e"), AMD_IOMMU_EVENT_DESC 117 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(int_dte_hit, "csource=0x0f"), AMD_IOMMU_EVENT_DESC 118 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(int_dte_mis, "csource=0x10"), AMD_IOMMU_EVENT_DESC 119 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(cmd_processed, "csource=0x11"), AMD_IOMMU_EVENT_DESC 120 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(cmd_processed_inv, "csource=0x12"), AMD_IOMMU_EVENT_DESC 121 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(tlb_inv, "csource=0x13"), AMD_IOMMU_EVENT_DESC 122 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(ign_rd_wr_mmio_1ff8h, "csource=0x14"), AMD_IOMMU_EVENT_DESC 123 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(vapic_int_non_guest, "csource=0x15"), AMD_IOMMU_EVENT_DESC 124 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(vapic_int_guest, "csource=0x16"), AMD_IOMMU_EVENT_DESC 125 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(smi_recv, "csource=0x17"), AMD_IOMMU_EVENT_DESC 126 arch/x86/events/amd/iommu.c AMD_IOMMU_EVENT_DESC(smi_blk, "csource=0x18"),