HOST1X_CHANNEL_DMACTRL   56 drivers/gpu/host1x/hw/cdma_hw.c 			 HOST1X_CHANNEL_DMACTRL);
HOST1X_CHANNEL_DMACTRL   76 drivers/gpu/host1x/hw/cdma_hw.c 			 HOST1X_CHANNEL_DMACTRL);
HOST1X_CHANNEL_DMACTRL   79 drivers/gpu/host1x/hw/cdma_hw.c 	host1x_ch_writel(ch, 0, HOST1X_CHANNEL_DMACTRL);
HOST1X_CHANNEL_DMACTRL  101 drivers/gpu/host1x/hw/cdma_hw.c 			 HOST1X_CHANNEL_DMACTRL);
HOST1X_CHANNEL_DMACTRL  121 drivers/gpu/host1x/hw/cdma_hw.c 			 HOST1X_CHANNEL_DMACTRL);
HOST1X_CHANNEL_DMACTRL  131 drivers/gpu/host1x/hw/cdma_hw.c 			 HOST1X_CHANNEL_DMACTRL);
HOST1X_CHANNEL_DMACTRL  135 drivers/gpu/host1x/hw/cdma_hw.c 	host1x_ch_writel(ch, 0, HOST1X_CHANNEL_DMACTRL);
HOST1X_CHANNEL_DMACTRL  163 drivers/gpu/host1x/hw/cdma_hw.c 				 HOST1X_CHANNEL_DMACTRL);
HOST1X_CHANNEL_DMACTRL  218 drivers/gpu/host1x/hw/cdma_hw.c 			 HOST1X_CHANNEL_DMACTRL);
HOST1X_CHANNEL_DMACTRL   25 drivers/gpu/host1x/hw/debug_hw_1x01.c 	dmactrl = host1x_ch_readl(ch, HOST1X_CHANNEL_DMACTRL);
HOST1X_CHANNEL_DMACTRL   25 drivers/gpu/host1x/hw/debug_hw_1x06.c 	dmactrl = host1x_ch_readl(ch, HOST1X_CHANNEL_DMACTRL);