HIT 179 arch/powerpc/perf/isa207-common.c ret |= P(SNOOP, HIT); HIT 184 arch/powerpc/perf/isa207-common.c ret |= P(SNOOP, HIT); HIT 191 arch/powerpc/perf/isa207-common.c ret |= P(SNOOP, HIT); HIT 215 arch/powerpc/perf/isa207-common.h #define PH(a, b) (P(LVL, HIT) | P(a, b)) HIT 55 arch/x86/events/intel/ds.c #define OP_LH (P(OP, LOAD) | P(LVL, HIT)) HIT 68 arch/x86/events/intel/ds.c OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT), /* 0x06: L3 hit, snoop hit */ HIT 70 arch/x86/events/intel/ds.c OP_LH | P(LVL, REM_CCE1) | REM | LEVEL(L3) | P(SNOOP, HIT), /* 0x08: L3 miss snoop hit */ HIT 72 arch/x86/events/intel/ds.c OP_LH | P(LVL, LOC_RAM) | LEVEL(RAM) | P(SNOOP, HIT), /* 0x0a: L3 miss, shared */ HIT 73 arch/x86/events/intel/ds.c OP_LH | P(LVL, REM_RAM1) | REM | LEVEL(L3) | P(SNOOP, HIT), /* 0x0b: L3 miss, shared */ HIT 83 arch/x86/events/intel/ds.c pebs_data_source[0x05] = OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT); HIT 92 arch/x86/events/intel/ds.c pebs_data_source[0x08] = OP_LH | pmem_or_l4 | P(SNOOP, HIT); HIT 93 arch/x86/events/intel/ds.c pebs_data_source[0x09] = OP_LH | pmem_or_l4 | REM | P(SNOOP, HIT); HIT 116 arch/x86/events/intel/ds.c val |= P(TLB, HIT); HIT 124 arch/x86/events/intel/ds.c val |= P(LVL, HIT); HIT 192 arch/x86/events/intel/ds.c val |= P(TLB, HIT) | P(TLB, L1) | P(TLB, L2); HIT 97 arch/x86/events/intel/p4.c P4_ESCR_EMASK_BIT(P4_EVENT_ITLB_REFERENCE, HIT) | HIT 547 arch/x86/events/intel/p4.c [ C(RESULT_ACCESS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_ITLB_REFERENCE, HIT, HIT 611 drivers/iommu/msm_iommu_hw-8xxx.h #define SET_HIT(b, c, v) SET_CONTEXT_FIELD(b, c, V2PSR, HIT, v) HIT 798 drivers/iommu/msm_iommu_hw-8xxx.h #define GET_HIT(b, c) GET_CONTEXT_FIELD(b, c, V2PSR, HIT) HIT 348 tools/perf/util/mem-events.c if (lvl & P(LVL, HIT)) { HIT 363 tools/perf/util/mem-events.c if (snoop & P(SNOOP, HIT)) HIT 373 tools/perf/util/mem-events.c if (snoop & P(SNOOP, HIT)) HIT 383 tools/perf/util/mem-events.c if (snoop & P(SNOOP, HIT)) HIT 401 tools/perf/util/mem-events.c if (lvl & P(LVL, HIT)) {