HISI_PMU_EVENT_ATTR 287 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c HISI_PMU_EVENT_ATTR(flux_wr, 0x00), HISI_PMU_EVENT_ATTR 288 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c HISI_PMU_EVENT_ATTR(flux_rd, 0x01), HISI_PMU_EVENT_ATTR 289 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c HISI_PMU_EVENT_ATTR(flux_wcmd, 0x02), HISI_PMU_EVENT_ATTR 290 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c HISI_PMU_EVENT_ATTR(flux_rcmd, 0x03), HISI_PMU_EVENT_ATTR 291 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c HISI_PMU_EVENT_ATTR(pre_cmd, 0x04), HISI_PMU_EVENT_ATTR 292 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c HISI_PMU_EVENT_ATTR(act_cmd, 0x05), HISI_PMU_EVENT_ATTR 293 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c HISI_PMU_EVENT_ATTR(rnk_chg, 0x06), HISI_PMU_EVENT_ATTR 294 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c HISI_PMU_EVENT_ATTR(rw_chg, 0x07), HISI_PMU_EVENT_ATTR 280 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(rx_ops_num, 0x00), HISI_PMU_EVENT_ATTR 281 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(rx_outer, 0x01), HISI_PMU_EVENT_ATTR 282 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(rx_sccl, 0x02), HISI_PMU_EVENT_ATTR 283 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(rx_ccix, 0x03), HISI_PMU_EVENT_ATTR 284 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(rx_wbi, 0x04), HISI_PMU_EVENT_ATTR 285 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(rx_wbip, 0x05), HISI_PMU_EVENT_ATTR 286 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(rx_wtistash, 0x11), HISI_PMU_EVENT_ATTR 287 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(rd_ddr_64b, 0x1c), HISI_PMU_EVENT_ATTR 288 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(wr_dr_64b, 0x1d), HISI_PMU_EVENT_ATTR 289 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(rd_ddr_128b, 0x1e), HISI_PMU_EVENT_ATTR 290 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(wr_ddr_128b, 0x1f), HISI_PMU_EVENT_ATTR 291 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(spill_num, 0x20), HISI_PMU_EVENT_ATTR 292 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(spill_success, 0x21), HISI_PMU_EVENT_ATTR 293 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(bi_num, 0x23), HISI_PMU_EVENT_ATTR 294 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(mediated_num, 0x32), HISI_PMU_EVENT_ATTR 295 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(tx_snp_num, 0x33), HISI_PMU_EVENT_ATTR 296 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(tx_snp_outer, 0x34), HISI_PMU_EVENT_ATTR 297 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(tx_snp_ccix, 0x35), HISI_PMU_EVENT_ATTR 298 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(rx_snprspdata, 0x38), HISI_PMU_EVENT_ATTR 299 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(rx_snprsp_outer, 0x3c), HISI_PMU_EVENT_ATTR 300 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(sdir-lookup, 0x40), HISI_PMU_EVENT_ATTR 301 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(edir-lookup, 0x41), HISI_PMU_EVENT_ATTR 302 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(sdir-hit, 0x42), HISI_PMU_EVENT_ATTR 303 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(edir-hit, 0x43), HISI_PMU_EVENT_ATTR 304 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(sdir-home-migrate, 0x4c), HISI_PMU_EVENT_ATTR 305 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c HISI_PMU_EVENT_ATTR(edir-home-migrate, 0x4d), HISI_PMU_EVENT_ATTR 283 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(rd_cpipe, 0x00), HISI_PMU_EVENT_ATTR 284 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(wr_cpipe, 0x01), HISI_PMU_EVENT_ATTR 285 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(rd_hit_cpipe, 0x02), HISI_PMU_EVENT_ATTR 286 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(wr_hit_cpipe, 0x03), HISI_PMU_EVENT_ATTR 287 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(victim_num, 0x04), HISI_PMU_EVENT_ATTR 288 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(rd_spipe, 0x20), HISI_PMU_EVENT_ATTR 289 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(wr_spipe, 0x21), HISI_PMU_EVENT_ATTR 290 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(rd_hit_spipe, 0x22), HISI_PMU_EVENT_ATTR 291 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(wr_hit_spipe, 0x23), HISI_PMU_EVENT_ATTR 292 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(back_invalid, 0x29), HISI_PMU_EVENT_ATTR 293 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(retry_cpu, 0x40), HISI_PMU_EVENT_ATTR 294 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(retry_ring, 0x41), HISI_PMU_EVENT_ATTR 295 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c HISI_PMU_EVENT_ATTR(prefetch_drop, 0x42),